MOS RESISTANCE CIRCUIT
PURPOSE:To provide a MOS resistance circuit which constructs a MOS transistor TR having the resistance value equal to the reference resistance and enables the power-down even when a MOS resistance is connected in series to an R string. CONSTITUTION:The resistance R and Rx are connected in series bet...
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Main Author | |
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Format | Patent |
Language | English |
Published |
20.05.1994
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Edition | 5 |
Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE:To provide a MOS resistance circuit which constructs a MOS transistor TR having the resistance value equal to the reference resistance and enables the power-down even when a MOS resistance is connected in series to an R string. CONSTITUTION:The resistance R and Rx are connected in series between the reference power supplies VR (+) and VR (-) with a connection terminal as VA. Meanwhile a TR Q1 and a resistance Ry are connected in series between both supplies VR (+) and VR (-) with a connection terminal as VB respectively. Furthermore these terminals VA and VB are defined as a plus input and a minus input respectively and an operational amplifier Op 1 is connected. The output terminal VG of the Op1 is defined as the gate input of the TR Q1. Then the TR Q1 is made to operate in a non-saturated state when both terminals VB and VA are virtually grounded, and the resistance value of the TR Q1 is controlled at (R/Rx).Ry. |
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Bibliography: | Application Number: JP19920286427 |