FORMATION OF MULTILAYER INTERCONNECTION ON SEMICONDUCTOR SUBSTRATE

PURPOSE:To provide a method by which a multilayer interconnection in which a sure electrical contact can be secured between an upper wiring and a lower wiring separated from each other with an insulating film is formed on a semiconductor substrate. CONSTITUTION:By using a semiconductor substrate 1 o...

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Bibliographic Details
Main Author SAIJO TAKASHI
Format Patent
LanguageEnglish
Published 06.05.1994
Edition5
Subjects
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Summary:PURPOSE:To provide a method by which a multilayer interconnection in which a sure electrical contact can be secured between an upper wiring and a lower wiring separated from each other with an insulating film is formed on a semiconductor substrate. CONSTITUTION:By using a semiconductor substrate 1 on which an insulating film 2 with grooves 3 at first wiring forming locations, a wiring material is deposited on the entire surface of the film 2 so that the grooves 3 can be completely filled up and the surface level of the material can become higher than the lower surface of second wiring. Then, after providing a mask 6 which selectively covers the positions at which the first wiring and second wiring are brought into electrical contact with each other on the film 4 of the wiring material, the first wiring is formed by etching the film 4 until the surface of the insulating film 2 is exposed. After forming first wiring and a conductive section for bringing the first and second wiring into electrical contact on the first wiring, a layer insulating film and the second wiring are formed.
Bibliography:Application Number: JP19920276300