SEQUENCE ARITHMETIC PROCESSOR AND SEQUENCE ARITHMETIC PROCESSING UNIT

PURPOSE:To obtain a sequence arithmetic processor and a sequence arithmetic processing unit in which the writing time to the memory of a coil output operation, etc., is reduced in appearance and an operation execution cycle is speeded up. CONSTITUTION:These devices are constituted to select the data...

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Bibliographic Details
Main Author NAKAGAWA TERUO
Format Patent
LanguageEnglish
Published 21.01.1994
Edition5
Subjects
CALCULATING
COMPUTING
CONTROL OR REGULATING SYSTEMS IN GENERAL
CONTROLLING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
FUNCTIONAL ELEMENTS OF SUCH SYSTEMS
MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS
PHYSICS
REGULATING
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Summary:PURPOSE:To obtain a sequence arithmetic processor and a sequence arithmetic processing unit in which the writing time to the memory of a coil output operation, etc., is reduced in appearance and an operation execution cycle is speeded up. CONSTITUTION:These devices are constituted to select the data to be used for an operation from either of the data read from multi-port RAM 2a, 2b or the data of a data register 6 at the inside of a processor by the states of an address coincidence signal 13 from an address comparator 12 comparing the read port address write port address of the multi-port RAM 2a, 2b and a data register effective signal 15. Therefore, even if the number of the multi- port RAM 2a, 2b increase or even when the read address and write address coincide, the read of the data to be used for the operation and the write of an arithmetic result become simultaneously possible and the operation can be performed at high speed.
Bibliography:Application Number: JP19920141677