PHASE-LOCKED LOOP PROVIDED WITH AUTOMATIC PHASE OFFSET CALIBRATION

• Main Authors: DEIBITSUDO EI BAIDO, KUREIGU EMU DEIBISU
• Format: Patent
• Language: English
• Published: 15.04.1994
• Edition: 5
• Subjects: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES; BASIC ELECTRONIC CIRCUITRY; ELECTRICITY

PURPOSE: To obtain a phase-locked loop using charge pump generators which are precisely matched to each other. CONSTITUTION: A phase-locked loop(PLL), having automatic internal phase offset calibration, is provided with a voltage-controlled oscillator which generates a restored data signal according to an error signal. A phase detector decides the phase difference between the restored data signal and a reference data signal. The PLL is connected to the phase detector and, at the same time, is provided with a charge pump circuit which generates an error signal according to the phase difference. The charge pump circuit is provided with first and second charge pump generators, which respectively generate first and second sets of pump signals and are connected to each other. The PLL is designed, so that phase correcting cycles and phase calibrating cycles can be executed alternately. In each phase correcting cycle, error signals are synthesized, based on the latest phase comparison, and in each phase calibrating cycle interposed between each phase-correcting cycle, a calibrating network works to adjust the second charge pump generator so that first and second sets of pump signals can be precisely balanced with each other, when the reference and restored data signals have a prescribed phaseal relation between them.