BINARY BASE BAND TRANSMITTER

PURPOSE:To reduce the scale of a signal processing. CONSTITUTION:The pause signal insertion circuit 11 of a transmission section T segments an input data signal S11 to convert its speed to be twice or over and gives a signal S12 with a clock signal synchronously with a data and a pause signal insert...

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Bibliographic Details
Main Authors KONO OSAMU, MATSUBARA TATSUO
Format Patent
LanguageEnglish
Published 12.02.1993
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Summary:PURPOSE:To reduce the scale of a signal processing. CONSTITUTION:The pause signal insertion circuit 11 of a transmission section T segments an input data signal S11 to convert its speed to be twice or over and gives a signal S12 with a clock signal synchronously with a data and a pause signal inserted thereto and subjected to multiplex to a waveform conversion circuit 12, in which the signal is converted into an analog base band signal S13 and it is sent to a transmission line W. The waveform shaping circuit 13 of a reception section R converts the analog base band signal S13 into a binary digital signal S14 and a pause signal detection circuit 14 detects a pause signal in the data. A data clock demultiplexer circuit 15 extracts only a clock signal from a multiplex signal according to the result of detection of the pause signal S15 and the predetermined system, delays the clock signal so as to be coincident with the phase of a data signal and supplies the signal S16 to a data processing circuit 16, in which the processing of speed conversion or the like is implemented based on the clock signal synchronously with the input data signal S11 to obtain an output data signal S17.
Bibliography:Application Number: JP19910187977