JPH05336404

PURPOSE:To decrease the circuit scale and reduce the cost by decreasing the number of multipliers. CONSTITUTION:Input image data and image data which are passed through a one-line delay unit 30 are adequately switched by a selector 40. The data selected by the selector 40 and data passed through two...

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Bibliographic Details
Main Authors YOKOTA KIYOSHI, MURAKAMI YOSHIYA, EGUCHI KOHEI
Format Patent
LanguageEnglish
Published 17.12.1993
Edition5
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
PICTORIAL COMMUNICATION, e.g. TELEVISION
RESONATORS
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Summary:PURPOSE:To decrease the circuit scale and reduce the cost by decreasing the number of multipliers. CONSTITUTION:Input image data and image data which are passed through a one-line delay unit 30 are adequately switched by a selector 40. The data selected by the selector 40 and data passed through two-line delay units 41 and 42 are multiplied by the output of a coefficient multiplier 50 through the multipliers 51-53, whose outputs are added by an adder 60.
Bibliography:Application Number: JP19920138999