JPH05252034

• Main Authors: MATSUURA TATSUJI, USUI KUNIHIKO, IMAIZUMI SHIGEKI, ANPO TAKAAKI
• Format: Patent
• Language: English
• Published: 28.09.1993
• Edition: 5
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY

PURPOSE:To obtain the A/D converter with high speed and high accuracy performance operated at a low power supply voltage by providing a full scale voltage adjustment means to a sub A/D converter of 2nd and succeeding blocks in a pipeline type A/D converter. CONSTITUTION:A 1st block 1 generates a difference signal between an input signal and an analog recovery signal in 2-bit quantization, that is, a residual signal. When a gain of an amplifier 1-3 amplifying the residual signal is insufficient, the residual signal does not reach a substantial fill scale but becomes a small full scale. When an error is in existence, a missing bit takes place in the quantization of a 2nd stage A/D converter 2-1 and a conversion error is increased. A full scale adjustment device 3 adjusting a 2nd stage full scale voltage is provided to prevent bit missing from being caused. Thus, the 2nd stage full scale is in matching with a small full scale to prevent an error in bit missing. As a result, the A/D converter with high speed and high accuracy performance operated at a low power supply voltage is obtained.