FRAME SYNCHRONIZATION MONITORING CIRCUIT

PURPOSE:To save power of a switching work by monitoring the state of a specific bit in a frame synchronization signal and automating the validating and invalidating of a CRC function at the same time when CRC frame synchronization information is retrieved. CONSTITUTION:When a PCM communication devic...

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Bibliographic Details
Main Author SUGA SEIICHI
Format Patent
LanguageEnglish
Published 02.07.1993
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PURPOSE:To save power of a switching work by monitoring the state of a specific bit in a frame synchronization signal and automating the validating and invalidating of a CRC function at the same time when CRC frame synchronization information is retrieved. CONSTITUTION:When a PCM communication device arranging a frame synchronization monitoring circuit is confronted with the PCM communication device having a CRC function, a synchronization information retrieval part 32 retrieves a specific bit composing the frame synchronization signal in the PCM signal from an input terminal 31 and outputs a frame synchronization confirmation signal. Next, a CRC frame synchronization information retrieval part 34 retireves the specific bit composing the CRC frame synchronization information and outputs a confirmation signal. Thus, a frame synchronization error notification signal from an error notification signal generation timer 35 is blocked by 3 input AND gates 37 and a frame synchronization monitoring is performed. When the PCM device having no CRC function is confronted, a CRC nonuse information retrieval part 33 retrieves the specific bit in this case and automatically invalidates the CRC function.
Bibliography:Application Number: JP19910329205