SEMICONDUCTOR DEVICE

PURPOSE:To obtain the title semiconductor device wherein an interelement isolation operation is executed surely and a gate leakage current is low by a method wherein the cross-sectional shape of the boundary of a region which crosses at least a gate electrode at the boundary between a removal region...

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Bibliographic Details
Main Author SHIODA MASAHIRO
Format Patent
LanguageEnglish
Published 25.05.1993
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE:To obtain the title semiconductor device wherein an interelement isolation operation is executed surely and a gate leakage current is low by a method wherein the cross-sectional shape of the boundary of a region which crosses at least a gate electrode at the boundary between a removal region from which a semiconductor layer including an active layer has been removed and a nonremoval region from which it is not removed is formed to be an inverted mesa shape. CONSTITUTION:A semiconductor device is provided with the following: semiconductor layers 12 to 16 which are formed on a semiconductor substrate 11 and which include an active layer 13 in at least one part; and a gate electrode 22 which is faced with the semiconductor layers 12 to 16 by a Schottky junction. It is provided with a structure wherein the boundary between a removal region from which the semiconductor layers 12 to 16 including the active layer 13 have been removed and a nonremoval region from which they are not removed crosses the gate electrode 22. In the semiconductor device, the cross-sectional shape of the boundary in a region which crosses at least the gate electrode 22 at the boundary between the removal region and the nonremoval region is formed to be an inverted mesa shape. For example, the semiconductor device is an AlInAS/GaInAs HEMT or the like.
Bibliography:Application Number: JP19910286176