MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To prevent decrease in leakage current, variation in threshold value, variation in conductance, and deterioration in element performance such as decrease in dielectric strength by making a structure where the boundary of source-drain diffusion regions and a substrate has a smooth distributio...

Full description

Saved in:
Bibliographic Details
Main Authors IIZUKA KATSUHIKO, SASAKI TAKAE
Format Patent
LanguageEnglish
Published 11.03.1992
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PURPOSE:To prevent decrease in leakage current, variation in threshold value, variation in conductance, and deterioration in element performance such as decrease in dielectric strength by making a structure where the boundary of source-drain diffusion regions and a substrate has a smooth distribution of concentration. CONSTITUTION:A gate insulating film 2, gate electrode material layer 3, and mask material pattern 4 are formed on a P-type semiconductor substrate 1. Next, determining N<+> type (high-doped) source-drain regions 6S, 6D and then removing a deposit 5 and the organic film 4a in the top layer of the pattern 4 leave the mask material pattern of an inorganic insulating film 4b. When the layer 3 is etched again vertically to the substrate with the pattern of the film 4b as a mask, a gate electrode pattern 3G is formed and used as a mask to determine N<-> type low-doped regions 7S, 7D by ion implantation so that the gate side boundary of the regions 6S, 6D and the p-type substrate 1 shows a smooth distribution of concentration. This design relieves leakage current and reduces dispersion in transistor characteristics such as threshold value and dielectric strength.
Bibliography:Application Number: JP19900191800