DMA CONTROLLER

PURPOSE:To accelerate processing speed by detecting abnormality in which command readout from a transfer control information table is not completed in a period to start the next block transfer by a DMAC comprehensively. CONSTITUTION:An abnormality detection circuit 30 to detect the abnormality is pr...

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Bibliographic Details
Main Authors WATABE KEN, KONDO NOBUKAZU, MARUYAMA TAKASHI, YU KEIICHI
Format Patent
LanguageEnglish
Published 19.02.1992
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PURPOSE:To accelerate processing speed by detecting abnormality in which command readout from a transfer control information table is not completed in a period to start the next block transfer by a DMAC comprehensively. CONSTITUTION:An abnormality detection circuit 30 to detect the abnormality is provided in the DMAC 1, and an abnormality reporting signal 31 to report the abnormality to an MPU 4 is provided. Therefore, since not only the abnormality can be detected by an I/O device 9, but it can be detected by the DMAC 1, processing can be immediately performed by the MPU 4. In such a way, it is possible to reduce hardware quantity in the whole system, and to easily perform system design. Also, no polling by an MPU program is required, and abnormality processing can be performed by the MPU program at high speed.
Bibliography:Application Number: JP19900159710