FRAME SYNCHRONIZATION MONITOR SYSTEM

PURPOSE:To prevent service from being interrupted immediately due to the result of a cyclic code check after the frame synchronization is established and the communication service is started. CONSTITUTION:A detection circuit 2 detects a frame signal included in a PCM signal inputted from a terminal...

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Bibliographic Details
Main Author SUGA SEIICHI
Format Patent
LanguageEnglish
Published 15.10.1992
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PURPOSE:To prevent service from being interrupted immediately due to the result of a cyclic code check after the frame synchronization is established and the communication service is started. CONSTITUTION:A detection circuit 2 detects a frame signal included in a PCM signal inputted from a terminal 1 and outputs a frame match pulse. A counter 5 receiving the pulse continuously through an AND circuit 4 for the prescribed number of times sets a flip-flop 7. As a result, a synchronization restoration latch signal 19 to start the operation of the check circuit 12 is outputted. A delay circuit 11 delays the signal 19 for a prescribed time and outputs the result. Thus, the check circuit 12 starts its operation in a lapse of a prescribed time after the synchronization restoration is confirmed by the detection of a subscriber and the PCM signal is sufficiently made stable.
Bibliography:Application Number: JP19910119559