SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To prevent an irregularity in a leakage current of a memory cell due to a reduction in a power source noise and an irregularity in heat generation by providing a plurality of internal step-down circuits for forming an operating voltage of a sense amplifier upon reception of a power source vo...

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Main Authors TAKANO MITSUHIRO, MORINO MAKOTO, ISHII KYOKO, UDO SHINJI, YOSHIOKA HIROSHI, MIYATAKE SHINICHI, TAKAHASHI TSUTOMU
Format Patent
LanguageEnglish
Published 14.09.1992
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Summary:PURPOSE:To prevent an irregularity in a leakage current of a memory cell due to a reduction in a power source noise and an irregularity in heat generation by providing a plurality of internal step-down circuits for forming an operating voltage of a sense amplifier upon reception of a power source voltage from an exterior corresponding to memory blocks one by one. CONSTITUTION:An X decoder 3 interprets an address signal having 9 bits X0-X9, and selects one word line. When an X address signal is fetched in synchronizm with a row address strobe signal RAS, an X series is selected. The word lines are selected one by one in each memory block, and one memory mat as indicated by a shade and one sense amplifier are operated. Internal step-down circuits 8 each for forming an operating voltage are respectively provided in the blocks corresponding to selection of the word line and dispersing operation of the amplifier. Thus, it prevents generation of noise of a high level due to flow of a large current concentrically to special wirings.
Bibliography:Application Number: JP19910040954