MANUFACTURE OF SOI-STRUCTURED SEMICONDUCTOR DEVICE

PURPOSE:To provide a back-channel control suitable for each of a p-channel transistor and n-channel transistor of a CMOS transistor by controlling a threshold value of a back-channel selectively and easily. CONSTITUTION:In the manufacture of this device, a process in which an impurity-doped region 6...

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Bibliographic Details
Main Authors ARIMOTO YOSHIHIRO, HIGAKI NAOSHI
Format Patent
LanguageEnglish
Published 11.09.1992
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE:To provide a back-channel control suitable for each of a p-channel transistor and n-channel transistor of a CMOS transistor by controlling a threshold value of a back-channel selectively and easily. CONSTITUTION:In the manufacture of this device, a process in which an impurity-doped region 6 for controlling a back-channel is formed on the surface of a supporting-side silicon substrate 1 through a thin silicon layer 2 and an insulated film 3 formed in the rear of the layer 2 and a process in which a MOSFET is formed in the thin silicon layer are included.
Bibliography:Application Number: JP19910037844