SEMICONDUCTOR MEMORY

PURPOSE:To substitute a minute defect around a defective bit by arranging a redundant block area at a position symmetric with an ordinary memory cell area with respect to a sense amplifier and relieving the defective bit in block units. CONSTITUTION:Instead of a redundant word line or a redundant bi...

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Bibliographic Details
Main Author FUJITA SHIGEAKI
Format Patent
LanguageEnglish
Published 27.07.1992
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Summary:PURPOSE:To substitute a minute defect around a defective bit by arranging a redundant block area at a position symmetric with an ordinary memory cell area with respect to a sense amplifier and relieving the defective bit in block units. CONSTITUTION:Instead of a redundant word line or a redundant bit line, the redundant memory cell area consisting of plural bits is arranged at the position symmetric with the ordinary memory cell area with respect to the sense amplifier. A substitute address program circuit stores a block address. Therefore, a low-order address unnecessary for the block address is not programmed. Then, the sum of the substitute address program circuit and a redundancy selection circuit is inputted in the redundant block as a control signal. Meanwhile, the inverted data is inputted in the ordinary memory cell area and the data of only either the redundant block or the ordinary memory cell area is inputted in the sense amplifier. By such constitution, the minute defect around the defective bit, which is caused by the influence of the defective bit, is substituted.
Bibliography:Application Number: JP19900335837