MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To reduce an interface level density at the junction interface between a second semiconductor layer and a gate and to obtain a HEMT whose gate characteristic is stable by a method wherein, after a metal layer has been laminated on the whole surface of the second semiconductor layer, the gate...

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Bibliographic Details
Main Author SHIODA MASAHIRO
Format Patent
LanguageEnglish
Published 08.06.1992
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Summary:PURPOSE:To reduce an interface level density at the junction interface between a second semiconductor layer and a gate and to obtain a HEMT whose gate characteristic is stable by a method wherein, after a metal layer has been laminated on the whole surface of the second semiconductor layer, the gate is formed by using a resist pattern for gate formation use. CONSTITUTION:Second semiconductor layers 4 to 6 whose forbidden band width is larger than that of a first semiconductor layer 3, whose electron affinity is small and which includes a high impurity concentration layer 5 are formed on the first semiconductor layer 3 whose impurity concentration is low; a gate 7a by a metal film is formed on them by using a resist pattern 8; a semiconductor device in which secondary electrons exist on the side of the first semiconductor layer 3 at the junction face between the first semiconductor layer 3 and the second semiconductor layers 4 to 6 and which controls the concentration of the secondary electrons by means of a voltage applied to a metal layer on the second semiconductor layers 4 to 6 is manufactured. When the semiconductor device is manufactured, the gate 7a is formed by using the resist pattern 8 after the metal layer 7 has been laminated on the whole surface of the second semiconductor layers 4 to 6. The junction interface 100 between the second semiconductor layers 4 to 6 and the gate 7a exists in a state that it does not come into contact with the air before the gate is formed.
Bibliography:Application Number: JP19900287649