PROTECTION CIRCUIT USING COUNTER

PURPOSE:To realize the inexpensive protection circuit whose circuit scale is small by implementing protection through a count-up or reset of an n-adic count means. CONSTITUTION:An error input signal passing through a selection means 10 is used for a count-up and reset signal to an n-adic count means...

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Bibliographic Details
Main Authors SHINOHARA AKIO, OIDE HIROYUKI
Format Patent
LanguageEnglish
Published 25.05.1992
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Summary:PURPOSE:To realize the inexpensive protection circuit whose circuit scale is small by implementing protection through a count-up or reset of an n-adic count means. CONSTITUTION:An error input signal passing through a selection means 10 is used for a count-up and reset signal to an n-adic count means 20, which is counted up or reset by using a pulse generated from a pulse generating means 40. An output of an inverting means 30 is inverted by a carry output outputted from the count means 20 when count-up consecutively takes place for n-times to detect and release output of the error input signal. Since the protection is implemented by the count-up and reset of the n-adic count means 20, the protection circuit is configurated inexpensively with a small circuit scale.
Bibliography:Application Number: JP19900275537