SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To prevent the increase in current consumption and the fluctuation of a power level by providing 1st and 2nd delay circuits to each input stage of 1st and 2nd transistors(TRs) to prevent a DC current in the change of the output stage from being caused. CONSTITUTION:To an input stage of 1st a...

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Bibliographic Details
Main Author TAKASE RIKIO
Format Patent
LanguageEnglish
Published 12.04.1991
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Summary:PURPOSE:To prevent the increase in current consumption and the fluctuation of a power level by providing 1st and 2nd delay circuits to each input stage of 1st and 2nd transistors(TRs) to prevent a DC current in the change of the output stage from being caused. CONSTITUTION:To an input stage of 1st and 2nd TRs 3, 4, 1st and 2nd delay circuits 5, 6 are provided respectively. The 1st and 2nd delay circuits 5, 6 retard a signal from an input terminal IN respectively and the timing in the operating state of the 1st and 2nd TRs 3, 4 is changed due to the difference from the delays to prevent the conduction state of the 1st and 2nd TRs 3, 4 between 1st and 2nd power supplies 1, 2. Thus, the increase in the current consumption is prevented and the fluctuation of the power supply level is avoided.
Bibliography:Application Number: JP19890224238