DYNAMIC RAM

PURPOSE:To maintain the potential of a memory cell at a source voltage even when loss occurs in the parasitic coupling capacity of a word line and a bit line by boosting the potential of the bit line over the source voltage when performing write. CONSTITUTION:When the rewrite of High data on the mem...

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Bibliographic Details
Main Author ICHIGUCHI TETSUICHIRO
Format Patent
LanguageEnglish
Published 03.04.1991
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Summary:PURPOSE:To maintain the potential of a memory cell at a source voltage even when loss occurs in the parasitic coupling capacity of a word line and a bit line by boosting the potential of the bit line over the source voltage when performing write. CONSTITUTION:When the rewrite of High data on the memory cell is performed, the potential of an Ni is set at the source voltage by falling an So' signal provided newly before the word line falls, and the potential of the bit line BL is boosted over the source voltage by the coupling of a capacity 12. Also, the value of boosting (boosted voltage - source voltage) can be set at the one equivalent to the loss of potential due to the parasitic coupling capacity 100 of the word line WL and the bit line BL. In such a way, the potential of the memory cell can be charged to the source voltage.
Bibliography:Application Number: JP19890215260