SEMICONDUCTOR DEVICE

PURPOSE:To reduce the area of a semiconductor element having a conductive region layer for applying substrate bias voltage by forming a region layer of one conductivity for applying the substrate bias voltage in a region layer of opposite conductivity formed on a semiconductor substrate of one condu...

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Bibliographic Details
Main Author AKIBA TOSHIHIKO
Format Patent
LanguageEnglish
Published 28.03.1991
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Summary:PURPOSE:To reduce the area of a semiconductor element having a conductive region layer for applying substrate bias voltage by forming a region layer of one conductivity for applying the substrate bias voltage in a region layer of opposite conductivity formed on a semiconductor substrate of one conductivity. CONSTITUTION:Source region layer of MOSFET, for example, is provided as a region layer 6 of opposite conductivity and a region layer 8 of one conductivity for applying substrate bias voltage is provided therein, where the polarity thereof is set to be same as that of a semiconductor substrate 2. A single contact hole 11 is formed in a layer insulation film 9 over a region including the entire region layer 9 of one conductivity and a part of the region layer 6 of opposite conductivity within such range as the positional shift with respect to the region layer 6 of opposite conductivity is absorbed. Consequently, the region layer 8 of one conductivity is contained in the contact hole 11 even if the contact hole 11 is associated with positional shift within allowable range. By such arrangement, the area of the region layer 6 of opposite conductivity is narrowed and the size of the element is reduced enabling high integration of semiconductor device.
Bibliography:Application Number: JP19890209911