PROGRAM OPERATION VERIFYING SYSTEM

PURPOSE:To directly confirm a program or data desired to verify actually by conforming the storage area of a register circuit to the address of the program, and storing an identification code at a read out/written address correspondence position. CONSTITUTION:A program operation detector 3 which lea...

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Bibliographic Details
Main Author ABE FUMIHIRO
Format Patent
LanguageEnglish
Published 26.03.1991
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Summary:PURPOSE:To directly confirm a program or data desired to verify actually by conforming the storage area of a register circuit to the address of the program, and storing an identification code at a read out/written address correspondence position. CONSTITUTION:A program operation detector 3 which leads in an address line, a data line, and a control line connecting a memory device 2 to a central control unit 1 is arranged, and the program operation detector is provided with a decoder circuit 31 which performs the code conversion of low-order (n) bits(n=1, 2,...) of the address outputted from the central control unit to a 2 bit format. And a one-bit area corresponding to the address at which the readout/write of the storage area of the memory device 2 is performed with the central control unit 1 is provided at the register circuit 33, while, the low- order bit of the address to be read out/written is code-converted at the decoder circuit 31, and a code 1 is set at the one-bit area corresponding to the read on/written address, and the completion of a call is stored. In such a way, it is possible to confirm the presence/absence of a program operation by performing the dump processing of the storage content of the register circuit 33.
Bibliography:Application Number: JP19890205965