JPH0334309B

PURPOSE:To supply a stable switch signal by employing as an input of a switch signal generator a logic sum signal of a trigger signal from a digital detector and a digital detector stop signal at the time of generating a latch signal. CONSTITUTION:A trigger signal generator 14 outputs a trigger sign...

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Bibliographic Details
Main Authors KOBORI YASUNORI, UEHARA YOICHI, GOTO KATSUHIKO, FUKUSHIMA ISAO
Format Patent
LanguageEnglish
Published 22.05.1991
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Summary:PURPOSE:To supply a stable switch signal by employing as an input of a switch signal generator a logic sum signal of a trigger signal from a digital detector and a digital detector stop signal at the time of generating a latch signal. CONSTITUTION:A trigger signal generator 14 outputs a trigger signal k immediately after a clock signal e is inputted to a detection counter 5 when a clock gate signal d becomes ''H'' level. A stop signal l which becomes ''H'' level only during the stopping period of the counter 5 is outputted from a transfer signal generator 3. These signals k, l are inputted to an OR gate 15, and the output m of the gate 15 is inputted to the reset terminal of an RS-FF 16. On the other hand, a signal n having the prescribed phase difference from a signal b which is outputted from a waveform shaper 2 is inputted to the set terminal of the RS- FF 16.
Bibliography:Application Number: JP19810206900