WIRING SYSTEM OF SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To facilitate a data management by a method wherein a grid wiring method and a gridless wiring method are mixed. CONSTITUTION:The coordinate values of a wiring region and the coordinate values of a wiring forbidden region existing within the wiring region are inputted from a data input devic...

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Bibliographic Details
Main Author ITOU MAKIKO
Format Patent
LanguageEnglish
Published 21.11.1991
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Summary:PURPOSE:To facilitate a data management by a method wherein a grid wiring method and a gridless wiring method are mixed. CONSTITUTION:The coordinate values of a wiring region and the coordinate values of a wiring forbidden region existing within the wiring region are inputted from a data input device 1 and are stored in a storage device 4. Then, the coordinate values of a starting point region 6a and an end point region 6b of a wiring, the distance of the wiring and a wiring width are inputted from the device 1 and are stored in the device 4. Then, a wiring lattice is set within the wiring region, whether which of wiring lattice points is a lattice point that allows wiring or not is operated by an arithmetic device 3 and a lattice point 9 that allows wiring and a lattice point 10 that does not allow wiring are decided and are stored in the device 4. Moreover, groups 8 of virtual terminals using a grid wiring method are respectively set on the wiring lattice around the regions 6a and 6b and are stored in the device 4. The coordinate values of a starting point 8a and an end point 8b and the coordinate values of a wiring route 11 are stored in the device 4 by the grid wiring method. Then, a gridless wiring is performed and a wiring route 12 is outputted to the device 4. The route 11, which is found by the grid wiring method, and the route 12, which is found by a gridless wiring method, are outputted to a data output device 5. Thereby, a data management and the recognition of a wiring possible route can be facilitated.
Bibliography:Application Number: JP19900061352