INFORMATION PROCESSOR

• Main Authors: KONDO NOBUKAZU, AOTSU HIROAKI, MARUYAMA TAKASHI, YU KEIICHI
• Format: Patent
• Language: English
• Published: 25.10.1991
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PURPOSE:To specify a factor place of an error and to perform a series of error processing in terms of software by providing a timer into a bus arbiter to monitor the bus releasing time together with an error information register. CONSTITUTION:A bus arbiter contained in a bus controller 4 includes a timer 16 which monitors the external bus masters 9-11 except an MPU 1 so as to prevent these bus masters from occupying the buses for a fixed time or longer. At the same time, an error information register 17 to which a direct access is possible from the MPU 1 is also included in the bus arbiter in order to store the information showing a specific bus master that is using a bus when a fault where a specific bus master never resigns its bus using right is produced and detected by the timer 16. When an error occurs, the bus arbiter sets an error information register 17 and at the same time applies an interruption to the MPU 1. thus the MPU 1 can forcibly acquire the bus using right and can have an access to the error information. As a result, a series of error processing can be attained in terms of software.