SEMICONDUCTOR INTEGRATED CIRCUIT FOR TELEPHONE SET

PURPOSE:To increase a memory protection voltage more by devising the circuit such that a redial memory or a memory cell and an input output of a repertory memory is driven at a voltage lower than a power supply voltage. CONSTITUTION:At memory readout, one of bit lines 3 is selected and an H level is...

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Bibliographic Details
Main Author OGASAWARA YASUAKI
Format Patent
LanguageEnglish
Published 27.09.1991
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Summary:PURPOSE:To increase a memory protection voltage more by devising the circuit such that a redial memory or a memory cell and an input output of a repertory memory is driven at a voltage lower than a power supply voltage. CONSTITUTION:At memory readout, one of bit lines 3 is selected and an H level is shifted to VDD level or VSSC level by a level shifter 4 and a signal is inputted to a RAM 5 driven at the VSSC level. Similarly, a level of a word line 6 is brought from an H level into the VDD level or VSSC level by a level shifter 7 and the signal is inputted to the RAM 5. An output 8 from the RAM 5 is shifted from H level into the VSSC or VDD level by a level shifter 9. Thus, a redial memory or a memory cell and an input/output of a repertory memory 5 is driven at a voltage level VSSC lower than a power supply voltage level VDD to increase the memory protection voltage more.
Bibliography:Application Number: JP19890246131