DMA CONTROLLER

PURPOSE:To assure the countermeasure for recovery of the abnormality by providing a means which decides whether the direct memory access (DMA) transfer information on the next data block to be stored is stored in a register or not before the start of transfer of the next data block. CONSTITUTION:An...

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Bibliographic Details
Main Authors MARUYAMA TAKASHI, YU KEIICHI, INAGAWA TAKASHI
Format Patent
LanguageEnglish
Published 02.09.1991
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PURPOSE:To assure the countermeasure for recovery of the abnormality by providing a means which decides whether the direct memory access (DMA) transfer information on the next data block to be stored is stored in a register or not before the start of transfer of the next data block. CONSTITUTION:An abnormality detection circuit 30 is provided in a direct memory access controller DMAC 1 to decide whether the DMA transfer information on the next data block to be stored is stored in a register group A 2 and a register group B 3 respectively or not before the start of transfer of the next data block at transfer of a link array chain. Thus it is possible to detect such abnormality where the read of a command given from a transfer information table 19 is not through in a period when the transfer of the next block is started. As a result, the countermeasure is assured for recovery of the abnormality.
Bibliography:Application Number: JP19890342549