CONTROLLER FOR STORAGE DEVICE

PURPOSE:To make asynchronously and freely access by providing a second competitive control part sending a refresh requiring signal, and a central processor selected by a first competitive control part, and a data buffer to execute the input and output of the data between storage devices. CONSTITUTIO...

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Bibliographic Details
Main Author KAWABATA YUKIYASU
Format Patent
LanguageEnglish
Published 02.08.1991
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Summary:PURPOSE:To make asynchronously and freely access by providing a second competitive control part sending a refresh requiring signal, and a central processor selected by a first competitive control part, and a data buffer to execute the input and output of the data between storage devices. CONSTITUTION:The subject device is provided with the second competitive control part 5b sending the refresh requiring signal at the time of refresh require ment at every prescribed interval from a refresh timer 4 by denying a memory access requirement of the requirement of the competitive decision and the cen tral processor selected by the first competitive control part 5a, and the data buffer 8 to execute the input/output of the data between the memory devices. By the first and the second competitive control parts 5a, 5b, the competitive control of refresh priority and the competitive control of memory access require ment from plural CPUs 1a, 1b are allowed to independently compete and by allowing the refresh requirement to have the priority, the competitive decision of memory access requirement from the plural CPUs 1a, 1b is executed. In such a manner, the controller for the storage device making a DRAM 2 access with asynchronous is obtained.
Bibliography:Application Number: JP19890318107