CELL FOR BLOCK ISOLATION

PURPOSE:To efficiently test a circuit by holding test data in an FF circuit to send it to another block after sending data of a test data input terminal to a test or normal data output terminal in the scan mode. CONSTITUTION:A cell consists of normal data input and output terminals IN and OU, test d...

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Bibliographic Details
Main Authors INOUE KEISUKE, AKUI SATOSHI
Format Patent
LanguageEnglish
Published 24.01.1991
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Summary:PURPOSE:To efficiently test a circuit by holding test data in an FF circuit to send it to another block after sending data of a test data input terminal to a test or normal data output terminal in the scan mode. CONSTITUTION:A cell consists of normal data input and output terminals IN and OU, test data input and output terminals SI and SO, a switch means TG1 which is turned on at the time of the normal mode to send normal data from the terminal IN to the terminal OU, and inverters IV3 and IV4 connected with the means TG1 between them and is provided with the FF circuit where data from the terminal SI is stored. In the scan mode, the FF circuit sends data from the terminal SI from the terminal IN to the terminal OU or SO and stores this data to send it to another block thereafter, and this operation is repeated for each time of test data input. Thus, test data is transferred to many cells through one input terminal in serial and the reverse transfer is possible, and test data is given to the circuit block through the cell without the increase of the number of input and output terminals to control it, and it is easily observed.
Bibliography:Application Number: JP19890150290