SEMICONDUCTOR

• Main Author: FUKUTOMI TAKESHI
• Format: Patent
• Language: English
• Published: 24.06.1991
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE:To realize element isolation without increasing the width of isolation between elements by providing potential difference between the first and second high density diffusion layers of opposite conductivity type to the isolated substrate and applying the potential of a polarity opposite to that of the potential difference of the high concentration diffusion layer to the semiconductor substrate. CONSTITUTION:When the potential reverse to the potential between high concentration diffusion layers 4 and 5 that elements are separated is applied to a semiconductor substrate 1, substrate bias effect acts, and the continuity of the potential between the first and second high concentration diffusion layers 4 and 5 of a thick parasitic MOS transistor where wirings are made on element isolating films becomes difficult. As a result, without inducing crystal defects, etc., the element isolation at the time of using high voltage (about 20 volt) can be made possible.