CHECKING METHOD FOR USER PROGRAM OF ONE CHIP MICROCOMPUTER

PURPOSE:To prevent only a specific program from being executed infinitely by confirming branch destination address with regard to a jump instruction, and thereafter, returning it forcedly to the next instruction of the jump instruction. CONSTITUTION:When a no-operation (NOP) instruction is set to an...

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Bibliographic Details
Main Author KON YOSHIHIKO
Format Patent
LanguageEnglish
Published 22.03.1990
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Summary:PURPOSE:To prevent only a specific program from being executed infinitely by confirming branch destination address with regard to a jump instruction, and thereafter, returning it forcedly to the next instruction of the jump instruction. CONSTITUTION:When a no-operation (NOP) instruction is set to an instruction register 28 and an instruction decoder 29 decodes it, a jump instruction control signal Xj becomes 'L', and a gate 38 from which 'H' of a signal Xj delayed by a D-flip-flop 42 is outputted becomes ON. Subsequently, by synchronizing with a system clock CPn, the gate 38 becomes ON, data of a program counter (PC) holding register 20 is set to an address register 22 and the next instruction of a jump instruction is designated. In this state, when a program is executed successively, when a return instruction is coded, it is decided by an RS flip-flop 45 and a gate 41, and when it is a single return instruction, it is replaced with the NOP instruction. In such a manner, a runaway of the program is prevented.
Bibliography:Application Number: JP19880234110