LOGIC INTEGRATED CIRCUIT

PURPOSE:To simplify the development of an in-circuit test program by connecting three-state output stages to all output pins, and providing signal input pins for setting high impedances to all the stages. CONSTITUTION:The input terminals of output stages C1 - Cn having three-state output modes are c...

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Bibliographic Details
Main Author MIZUNIWA YASUHIRO
Format Patent
LanguageEnglish
Published 07.03.1990
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Summary:PURPOSE:To simplify the development of an in-circuit test program by connecting three-state output stages to all output pins, and providing signal input pins for setting high impedances to all the stages. CONSTITUTION:The input terminals of output stages C1 - Cn having three-state output modes are connected to the output terminals of a logic circuit part L1. The output terminals are connected to output pins 01 - On. An input pin IT is pulled up with a pull-up resistor R in the circuit L. A buffer G0 is a buffer whose output terminal is connected to the pin IT. OR gates Gp+1 - Gn take the OR of the outputs of the circuit L1 and the output of the buffer G0 and output the output-mode control signals for the output stages Gp+1 - Gn. When '0' signals are inputted into input pins IT2 and IT3 of logic integrated circuits IC4 and IC5, all output pins of the circuit IC4 and IC5 become a high impedance state. Currents hardly flow in the output stages of the circuits IC4 and IC5 even if the circuits are forcibly driven into '1' or '0'. The possibility of deterioration and breakdown of the integrated circuit due to heat is eliminated.
Bibliography:Application Number: JP19880218597