DISPLAY CONTROLLER

PURPOSE:To improve the display speed with a display controller by using a horizontal screen division data output device and an address converter and therefore displaying a window on a base screen with no use of a refresh frame memory. CONSTITUTION:In a horizontal blanking period, a base screen addre...

Full description

Saved in:
Bibliographic Details
Main Author NAKASE YOSHIMORI
Format Patent
LanguageEnglish
Published 02.02.1990
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:PURPOSE:To improve the display speed with a display controller by using a horizontal screen division data output device and an address converter and therefore displaying a window on a base screen with no use of a refresh frame memory. CONSTITUTION:In a horizontal blanking period, a base screen address generator 21 sends a base screen address 211 to a frame buffer 23. The buffer 23 supplies the horizontal line screen division pointer data 271 to a horizontal line screen division data output device 26. While a window horizontal line address generator 24 produces successively the horizontal addresses of a window C from the win dow start address in response to the horizontal counter value P1. Then a frame buffer address switch generator 25 sends a switch signal 251 to an address switch 22 at the time point when the horizontal counter reaches the value P1 and sends the address 211 to the buffer 23. Thus, it is possible to display a window on a base screen without using a refresh memory.
Bibliography:Application Number: JP19880184915