NEURON ELEMENT CIRCUIT

PURPOSE:To improve accuracy for integration to be required as a neural network, to improve integration and to reduce power to be consumed by providing a field-effect transistor, integrating circuit formed by a current mirror circuit, adder circuit formed by an operational amplifier and sigmoid funct...

Full description

Saved in:
Bibliographic Details
Main Author MORISHITA TADAYUKI
Format Patent
LanguageEnglish
Published 27.12.1990
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PURPOSE:To improve accuracy for integration to be required as a neural network, to improve integration and to reduce power to be consumed by providing a field-effect transistor, integrating circuit formed by a current mirror circuit, adder circuit formed by an operational amplifier and sigmoid function generating circuit. CONSTITUTION:One neuron element is composed of a number, which corresponds to the number of the input neuron elements in a preceding step, of FET 1 to be operated in a saturating area, current mirror circuit, operation amplifier 3 to add currents, operational amplifier circuit formed by a bipolar transistor, which constitutes the sigmoid function generating circuit, and operational amplifier 4 to adjust a reference potential Vcc of an output voltage and a amplitude. Accordingly, the accuracy can be improved for the integrating circuit and the number of the transistors to be required for each neuron element is reduced. Thus, the highly integrated neural network can be constructed with low power consumption.
Bibliography:Application Number: JP19890132838