BUFFER MEMORY READ CONTROL SYSTEM FOR ATM EXCHANGE CHANNEL

PURPOSE:To enlarge buffer memory capacity, to prevent a transmission delay from being extended, and to suppress cell dumping as far as possible by measuring the cell storage quantity of a buffer memory at every input highway, and reading the cell from the buffer memory based on cell storage quantity...

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Bibliographic Details
Main Authors KATO YUJI, KAMOI EDAMASU, HAYAMI SHICHIRO
Format Patent
LanguageEnglish
Published 16.08.1990
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Summary:PURPOSE:To enlarge buffer memory capacity, to prevent a transmission delay from being extended, and to suppress cell dumping as far as possible by measuring the cell storage quantity of a buffer memory at every input highway, and reading the cell from the buffer memory based on cell storage quantity information. CONSTITUTION:A buffer memory control part 4-i1 has the both functions of a cell stored quantity measuring device, which measures the cell storage quantity of a buffer memory 1-i1 at every input highway, and a cell read sequence controller, which reads the cell from the buffer memory 1-i1 based on the cell storage quantity information from each cell storage quantity measuring device and controls the sending of the cell to an output highway #1. In a token, which circulates a read control line 5, a buffer memory number to have rewritten the token and the priority level of the buffer memory 1-i1 are written. Thus the buffer memory at which many cells arrive has the high read priority, and the buffer memory at which few cells arrives has the low read priority.
Bibliography:Application Number: JP19890026182