DIVIDER

PURPOSE:To perform fast division by switching a first division means which generates a quotient of two bits and a second division means which generates the quotient of three or more bits by using a stretch division method. CONSTITUTION:It is judged whether or not the generation of the quotient of pl...

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Bibliographic Details
Main Author YAMAUCHI MIKAKO
Format Patent
LanguageEnglish
Published 02.11.1989
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PURPOSE:To perform fast division by switching a first division means which generates a quotient of two bits and a second division means which generates the quotient of three or more bits by using a stretch division method. CONSTITUTION:It is judged whether or not the generation of the quotient of plural bits is possible by providing a coincidence detection circuit 23. In such a case, since the above judgement is performed in parallel with the two-bit operation of the stretch division method by providing a two-bit shifter for the quotient and partial remainder, a processing time can be shortened. Also, when it is judged that the generation of the quotient of three or more bits is possible, a stretch division processing is performed on a third bit and after by using a priority encoder 11 and a barrel shifter 8, however, by providing a shift-in data generation circuit 20 and an FF17, it is possible to perform an efficient processing to generate the quotient of plural bits as performing calculation for the next step.
Bibliography:Application Number: JP19880103031