PARITY FUNCTION TEST METHOD FOR SEMICONDUCTOR MEMORY HAVING PARITY FUNCTION

PURPOSE:To facilitate a parity function test by reading out data in an ON state of a parity check function and carrying out the test of parity check function. CONSTITUTION:The test data and a prescribed parity are outputted from a test device and supplied to a semiconductor memory via a data input t...

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Bibliographic Details
Main Authors OOTA KEIJI, OCHIAI KAZUAKI
Format Patent
LanguageEnglish
Published 11.08.1989
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PURPOSE:To facilitate a parity function test by reading out data in an ON state of a parity check function and carrying out the test of parity check function. CONSTITUTION:The test data and a prescribed parity are outputted from a test device and supplied to a semiconductor memory via a data input terminal 5 and a parity input terminal. Then a parity function ON signal is outputted from the test device and the semiconductor memory is set in a parity ON state and also in a data reading mode. Then the data are read out and the output signal of a parity check circuit 4 is outputted to outside from the semiconductor memory and inputted to the test device based on the test data and the parity received from the test device. The test device checks whether the circuit 4 is functioning normally or not. Thus, the parity check function is tested.
Bibliography:Application Number: JP19880025885