SEMICONDUCTOR DEVICE

PURPOSE:To reduce adverse effect to peripheral circuits on the same chip, which is caused by the leakage of an AC signal into a P-type Si substrate, by a method wherein a first n<+> diffused layer, which is connected to a grounding terminal, is provided in the surface of part of an n-type Si e...

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Bibliographic Details
Main Authors SHIMAZU TAKAYUKI, KAMATANI YASUHIRO, MIZUTANI SHIRO
Format Patent
LanguageEnglish
Published 09.08.1989
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Summary:PURPOSE:To reduce adverse effect to peripheral circuits on the same chip, which is caused by the leakage of an AC signal into a P-type Si substrate, by a method wherein a first n<+> diffused layer, which is connected to a grounding terminal, is provided in the surface of part of an n-type Si epitaxial layer. CONSTITUTION:An electrode 8 provided in such a way as to come into contact to an n<+> diffused layer 7 formed in the surface of part of an n-type Si epitaxial layer 2 is connected to a grounding terminal 9. A semiconductor junction capacitor, which is needed, is formed between a P-type diffused layer 3 and an n-type diffused layer 4 and an unintended junction capacitor is formed between the layers 3 and 2 as well. However, as the layer 2 is earthed by the layer 7, the electrode 8 and the terminal 9, an AC signal leaked in the layer 2 through the junction capacitor, which is formed between the layers 3 and 2, out of AC signals to pass through between the layers 3 and 4 does not flow through a P-type Si substrate 1 by the so-called shielding effect.
Bibliography:Application Number: JP19880024255