PHASE SYNCHRONIZING DEVICE

• Main Author: NISHIGORI YOSHIHISA
• Format: Patent
• Language: English
• Published: 06.07.1989
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; PICTORIAL COMMUNICATION, e.g. TELEVISION

PURPOSE:To accurately detect a phase difference between an internal generating horizontal synchronizing signal and an input horizontal synchronizing signal in a digital value by equipping a register, which reads the contents of the time counter of a horizontal synchronizing signal as the phase difference between the horizontal synchronizing signal and the internal generating horizontal synchronizing signal, and a multiplying circuit to amplify the output of this register. CONSTITUTION:A register 7 expresses the phase difference between the horizontal synchronizing signal, which is an input signal, and the internal generating horizontal synchronizing signal. A value, which is inputted from a terminal 6, is subtracted from a phase difference signal in a subtracting circuit 8. The phase difference is amplified by a multiplying circuit 9 and converted to an analog signal by a DAC11. Then, a low area component is fetched by an LPE10 and the phase difference is returned to a VCO3. Thus, since the phase difference between the horizontal synchronizing signal, which is the input signal, and the internal generating horizontal synchronizing signal is detected in the digital value and returned to the VCO3, the VCO3 generates a clock to be synchronized to the horizontal synchronizing signal, which is the input signal. By the value to be inputted from the terminal 6, the phase of the internal generating horizontal synchronizing signal can be controlled.