JP2971157B

PURPOSE:To transfer lots of packets at a high speed by effectively utilizing a data area for a buffer memory. CONSTITUTION:A control processor 3 reads information representing a storage address and header information of a packet data stored in a transmission buffer memory 1 at first and stores the i...

Full description

Saved in:
Bibliographic Details
Main Author FUJIKAWA FUYUKI
Format Patent
LanguageEnglish
Published 02.11.1999
Edition6
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
Online AccessGet full text

Cover

More Information
Summary:PURPOSE:To transfer lots of packets at a high speed by effectively utilizing a data area for a buffer memory. CONSTITUTION:A control processor 3 reads information representing a storage address and header information of a packet data stored in a transmission buffer memory 1 at first and stores the information to a path dependent command table memory 4 depending on header information of the transmission data and stores the information representing the storage address of the header information in the path dependent command table memory 4 into a path dependent command table address memory 7. Then a read address of the path dependent command table memory 4 is designated based on the information stored in the path dependent command table address memory 7 to read each information stored by the header information and the read address of the transmission buffer memory 1 is designated by the information representing the storage address of the transmission data read from the path dependent command table memory 4 to read the transmission data.
Bibliography:Application Number: JP19910052970