JP2573253B

PURPOSE:To match the sending speed of a facsimile signal with the recording speed of a facsimile picture receiving device and to execute high-speed sending and efficient transmission by counting the number of scanning lines multiplexed in a packet and controlling the sending interval of the packet b...

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Bibliographic Details
Main Authors MISONOO ISAMU, OOTA MASATOSHI
Format Patent
LanguageEnglish
Published 22.01.1997
Edition6
Subjects
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Summary:PURPOSE:To match the sending speed of a facsimile signal with the recording speed of a facsimile picture receiving device and to execute high-speed sending and efficient transmission by counting the number of scanning lines multiplexed in a packet and controlling the sending interval of the packet based on this. CONSTITUTION:Picture transmitting data B, a data gate signal D from a data gate 21, and a strobe signal C for a sample are supplied to an inter-scanning line detecting circuit 22, and a scanning line identifying signal 2 is fetched in the timing of the strobe signal C. The picture transmitting data for 1 packet are stored in a data buffer 27 in the timing of the strobe signal C in a clock signal G, and the stored data are read in the timing of a clock from a clock generating circuit 29 in the clock signal G and supplied to a data converting circuit 30. When a page completing detecting circuit 32 detects the prescribed number of scanning line identifying signal pulses E, it generates a page completing signal Q. By supplying this page completing signal Q to a facsimile picture transmitting device 11, the sending of the facsimile picture signal for a next page is permitted.
Bibliography:Application Number: JP19870244396