JP2572292B
A device for transmitting a synchronous data which transmits data asynchronously from a first system controller to a second system controller. Transferred data is doubly stored in a first and a second memory. The data outputted from the first system controller is written in the first and second memo...
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English |
Published |
16.01.1997
|
Edition | 6 |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A device for transmitting a synchronous data which transmits data asynchronously from a first system controller to a second system controller. Transferred data is doubly stored in a first and a second memory. The data outputted from the first system controller is written in the first and second memories alternatively in correspondence to the data transmission of the first system controller. When the writing is completed, the second system controller reads the data in one of the memories in which the writing has been completed earlier than the other, and the next writing by the first system controller is performed to the latter memory. Thereby, the access to one of the system controllers need not wait temporarily, the transmission of a block of a large amount of data is not interrupted during the access to each controller, and accurate high-speed data transmission accompanied by no error can be performed. |
---|---|
Bibliography: | Application Number: JP19900123461 |