METHODS OF MINIMIZING WAFER BACKSIDE DAMAGE IN SEMICONDUCTOR WAFER PROCESSING

• Main Authors: GANESH BALASUBRAMANIAN, HU LIANGFA, ABDUL AZIZ KHAJA, SUDHA S RATHI
• Format: Patent
• Language: English; Japanese
• Published: 30.07.2024
• Subjects: BASIC ELECTRIC ELEMENTS; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER; ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; GENERATION; SEMICONDUCTOR DEVICES

To provide substrate supports for semiconductor processing which inhibit damage to a substrate backside.SOLUTION: A substrate support 200 includes: a body 202 comprising a substrate-chucking surface 212; an electrode 206 disposed within the body; a plurality of substrate-supporting features formed on the substrate-chucking surface, where the number of substrate-supporting features increases radially from a center of the substrate-chucking surface to an edge of the substrate-chucking surface; and a seasoning layer formed on the plurality of the substrate-supporting features, the seasoning layer comprising a silicon nitride.SELECTED DRAWING: Figure 2 【課題】半導体処理のための基板裏面への傷発生を抑制した基板支持体を提供する。【解決手段】基板支持体２００は、基板チャッキング２１２面を備える本体２０２と、本体内に配置された電極２０６と、基板チャッキング面上に形成され、その数が、基板チャッキング面の中心から基板チャッキング面の縁部に向かって半径方向に増加している複数の基板支持フィーチャと、複数の基板支持フィーチャ上に形成される窒化ケイ素を含むシーズニング層と、を含む。【選択図】図２