SEMICONDUCTOR DEVICE

• Main Authors: TATSUMI TAIZO, TANOMURA MASAHIRO
• Format: Patent
• Language: English; Japanese
• Published: 18.04.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a semiconductor element capable of suppressing characteristic deterioration.SOLUTION: An amplifier comprises an FET, an input matching circuit, and an output matching circuit. The FET comprises: a substrate 10; a source electrode 12; a drain electrode 16; a first gate electrode 14a; a second gate electrode 14b; a gate pad provided so as to sandwich the first gate electrode between the gate pad and the second gate electrode and electrically connected to the first gate electrode; a first gate line 18 provided above the source electrode and opposite to the substrate with respect to the source electrode, and extending in a first direction Y; a second gate line 19b provided above the source electrode and extending in a second direction X crossing the first direction Y, having a first end connected to the first gate line and a second end opposite the first end electrically connected to the second gate electrode outside the source electrode; and a first guard metal layer 21b provided between the second gate line and the drain electrode and at least a part thereof is provided closer to the drain electrode than the source electrode, and electrically connected to the source electrode.SELECTED DRAWING: Figure 3 【課題】特性劣化抑制可能な半導体素子を提供する。【解決手段】ＦＥＴ、入力整合回路及び出力整合回路を備えている増幅器において、ＦＥＴは、基板１０と、ソース電極１２と、ドレイン電極１６と、第１ゲート電極１４ａと、第２ゲート電極１４ｂと、第２ゲート電極とで第１ゲート電極を挟むように設けられ、第１ゲート電極と電気的に接続されるゲートパッドと、ソース電極の基板とは反対側の上方に設けられ、第１方向に延伸する第１ゲート配線１８と、ソース電極の上方に設けられ、第１方向Ｙに交差する第２方向Ｘに延伸し、第１端が第１ゲート配線と接続され、第１端とは反対の第２端がソース電極の外において第２ゲート電極と電気的に接続される第２ゲート配線１９ｂと、第２ゲート配線とドレイン電極との間に設けられ、少なくとも一部はソース電極よりドレイン電極の方に設けられ、ソース電極と電気的に接続された第１ガード金属層２１ｂ他と、を備える。【選択図】図３