SEMICONDUCTOR STORAGE DEVICE
To provide a semiconductor storage device capable of suitably being manufactured.SOLUTION: A semiconductor storage device comprises a plurality of memory finger structures and a kerf region. The plurality of memory finger structures comprise a first laminate (SSMCL) including a plurality of conducti...
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Format | Patent |
Language | English Japanese |
Published |
03.04.2024
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a semiconductor storage device capable of suitably being manufactured.SOLUTION: A semiconductor storage device comprises a plurality of memory finger structures and a kerf region. The plurality of memory finger structures comprise a first laminate (SSMCL) including a plurality of conductive layers (110) laminated in a lamination direction (Z), and a plurality of semiconductor pillars facing the plurality of conductive layers. The kerf region includes a second laminate (SSKL) including a plurality of layers (150) laminated in the lamination direction corresponding to at least a part of the plurality of conductive layers. A first region in the kerf region is arranged side by side with a part of the plurality of memory finger structures in a first direction (X), and includes a part of the second laminate. A second region in the kerf region is arranged side by side with other parts of the plurality of memory finger structures in the first direction, and does not include the second laminate. A third region (RSW) in the kerf region extends in a second direction (Y) along an end part of the memory plane area side in the first direction of the kerf region, and includes other parts of the second laminate.SELECTED DRAWING: Figure 10
【課題】好適に製造可能な半導体記憶装置を提供する。【解決手段】半導体記憶装置は、複数のメモリフィンガー構造と、カーフ領域と、を備える。複数のメモリフィンガー構造は、積層方向(Z)に積層された複数の導電層(110)を含む第1積層体(SSMCL)と、複数の導電層に対向する複数の半導体柱と、を備える。カーフ領域は、複数の導電層の少なくとも一部に対応して積層方向に積層された複数の層(150)を含む第2積層体(SSKL)を備える。カーフ領域中の第1領域は、複数のメモリフィンガー構造の一部と第1方向(X)に並び、第2積層体の一部を含む。カーフ領域中の第2領域は、複数のメモリフィンガー構造の他の一部と第1方向に並び、第2積層体を含まない。カーフ領域中の第3領域(RSW)は、カーフ領域の第1方向のメモリプレーン領域側の端部に沿って第2方向(Y)に延伸し、第2積層体の他の一部を含む。【選択図】図10 |
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Bibliography: | Application Number: JP20220150935 |