SEMICONDUCTOR STORAGE DEVICE

• Main Authors: SAKAGUCHI NATSUKI, MAEDA TAKASHI, FUNATSUKI RIEKO, SHIGA HIDEHIRO
• Format: Patent
• Language: English; Japanese
• Published: 02.04.2024
• Subjects: ELECTRICITY; INFORMATION STORAGE; PHYSICS; STATIC STORES

To provide a semiconductor storage device capable of performing a write operation at a higher speed.SOLUTION: A control circuit executes a first pulse application operation, a precharge operation, and a second pulse application operation when executing a write operation on a memory cell transistor. In the first pulse application operation, a threshold voltage of a first memory cell transistor sMT is lowered. In the precharge operation, in a state in which select transistors ST1, T2, ST3 are turned on, a third voltage Vss is applied to a first word line sWL, and a fourth voltage Vdd is applied to a source line SL, so that a bit line is charged. In the second pulse application operation, in a state in which the first select transistor ST1 is turned on and the second select transistors ST2, ST3 are turned off, a first voltage Vpgm is applied to the first word line sWL.SELECTED DRAWING: Figure 12 【課題】より高速に書き込み動作を行うことが可能な半導体記憶装置が提供される。【解決手段】制御回路は、メモリセルトランジスタに対して書き込み動作を実行する際に第１パルス印加動作を実行し、プリチャージ動作を実行し、第２パルス印加動作を実行する。第１パルス印加動作では、第１メモリセルトランジスタｓＭＴの閾値電圧を低下させる。プリチャージ動作では、選択トランジスタＳＴ１，Ｔ２，ＳＴ３をオンさせた状態で、第３電圧Ｖｓｓを第１ワード線ｓＷＬに印加し、第４電圧Ｖｄｄをソース線ＳＬに印加することにより、ビット線を充電する。第２パルス印加動作では、第１選択トランジスタＳＴ１をオンさせるとともに、第２選択トランジスタＳＴ２，ＳＴ３をオフさせた状態で、第１ワード線ｓＷＬに第１電圧Ｖｐｇｍを印加する。【選択図】図１２