SiC SEMICONDUCTOR DEVICE

• Main Authors: UENO MAYA, NAKANO YUUKI, KUTSUMA YASUNORI, HARUYAMA SAWA, NAKAZAWA SEIYA, KAWAKAMI YASUHIRO
• Format: Patent
• Language: English; Japanese
• Published: 01.02.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide an SiC semiconductor device capable of suppressing wet spreading of a conductive joining material in an SiC semiconductor layer including a side surface having a rough surface region.SOLUTION: An SiC semiconductor device 1 includes: an SiC semiconductor layer 2 (SiC chip) having a stacked structure including an SiC semiconductor substrate 6 (SiC substrate) and an SiC epitaxial layer 7, and including a first main surface 3 at the SiC epitaxial layer 7 side, a second main surface 4 of the SiC semiconductor substrate 6, and side surfaces 5A to 5D; rough surface regions 20A to 20D formed in a portion composed of the SiC semiconductor substrate 6 among the side surfaces 5A to 5D; and smooth surface regions 21A to 21D formed in a portion composed of the SiC epitaxial layer 7 among the side surfaces 5A to 5D.SELECTED DRAWING: Figure 3 【課題】粗面領域を有する側面を含むＳｉＣ半導体層において、導電接合材の濡れ拡がりを抑制できるＳｉＣ半導体装置を提供する。【解決手段】ＳｉＣ半導体装置１は、ＳｉＣ半導体基板６（ＳｉＣ基板）およびＳｉＣエピタキシャル層７を含む積層構造を有し、ＳｉＣエピタキシャル層７側の第１主面３、ＳｉＣ半導体基板６の第２主面４および側面５Ａ～５Ｄを含むＳｉＣ半導体層２（ＳｉＣチップ）と、側面５Ａ～５ＤのうちＳｉＣ半導体基板６からなる部分に形成された粗面領域２０Ａ～２０Ｄと、側面５Ａ～５ＤのうちＳｉＣエピタキシャル層７からなる部分に形成された滑面領域２１Ａ～２１Ｄと、を含む。【選択図】図３