METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE, METHOD FOR MANUFACTURING POWER CONVERSION SYSTEM, SEMICONDUCTOR MODULE, POWER CONVERSION SYSTEM

To suppress the occurrence of shrinkage nests in semiconductor modules by the technology disclosed in this application specification.SOLUTION: A method for manufacturing a semiconductor module relating to the technology disclosed in this application specification is to bond a semiconductor element t...

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Bibliographic Details
Main Authors FUJINO JUNJI, OGAWA MICHIO, KAWAZOE CHIKA
Format Patent
LanguageEnglish
Japanese
Published 07.12.2023
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Summary:To suppress the occurrence of shrinkage nests in semiconductor modules by the technology disclosed in this application specification.SOLUTION: A method for manufacturing a semiconductor module relating to the technology disclosed in this application specification is to bond a semiconductor element to the top surface of an insulating substrate, the insulating substrate to which the semiconductor device is bonded is bonded to the base portion via a first solder, the joining of the insulating substrate and the base portion is performed by cooling the first solder while bringing the heated first solder into contact with the insulating substrate and the base portion and applying vibration to the first solder after the temperature of the first solder begins to drop.SELECTED DRAWING: Figure 3 【課題】本願明細書に開示される技術は、半導体モジュールにおいて、引け巣の発生を抑制するための技術である。【解決手段】本願明細書に開示される技術に関する半導体モジュールの製造方法は、絶縁基板の上面に、半導体素子を接合し、半導体素子が接合された絶縁基板を、第1のはんだを介してベース部に接合し、絶縁基板とベース部との接合が、加熱された第1のはんだを絶縁基板とベース部とに接触させた状態で、温度下降が始まった後の第1のはんだに振動を与えつつ第1のはんだを冷却することである。【選択図】図3
Bibliography:Application Number: JP20220085890