CIRCUIT DEVICE AND OSCILLATOR

• Main Authors: TSUTSUMI AKIO, ITO HISAHIRO, SATO HIDEKI
• Format: Patent
• Language: English; Japanese
• Published: 13.10.2023
• Subjects: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES; BASIC ELECTRONIC CIRCUITRY; ELECTRICITY

To provide a circuit device, etc., that can reduce noise in a clock signal caused by fluctuations in a reference voltage.SOLUTION: A circuit device 20 includes a slope signal generation circuit 22 for generating a slope signal SLP based on a feedback clock signal FBCK, a first phase comparison circuit 30 including a sampling circuit 32 for sampling the slope signal SLP based on a reference clock signal RFCK, a pulsar circuit 24, a first charge pump circuit 40 for outputting the current corresponding to a sampling voltage VSA during an active period of a pulse signal PLS, and a clock signal generation circuit 70 for generating a clock signal CK having a frequency to be controlled based on the output of the first charge pump circuit 40. The first charge pump circuit 40 has a filter circuit 46 for performing filter processing on the reference voltage VR, and outputs the current corresponding to the difference between the sampling voltage VSA and the filtered reference voltage VRF during the active period of the pulse signal PLS.SELECTED DRAWING: Figure 1 【課題】基準電圧の変動に起因するクロック信号のノイズを低減できる回路装置等の提供。【解決手段】回路装置２０は、フィードバッククロック信号ＦＢＣＫに基づきスロープ信号ＳＬＰを生成するスロープ信号生成回路２２と、基準クロック信号ＲＦＣＫに基づきスロープ信号ＳＬＰをサンプリングするサンプリング回路３２を有する第１位相比較回路３０と、パルサー回路２４と、パルス信号ＰＬＳのアクティブ期間においてサンプリング電圧ＶＳＡに応じた電流を出力する第１チャージポンプ回路４０と、第１チャージポンプ回路４０の出力に基づき制御される周波数のクロック信号ＣＫを生成するクロック信号生成回路７０を含む。第１チャージポンプ回路４０は基準電圧ＶＲをフィルター処理するフィルター回路４６を有し、パルス信号ＰＬＳのアクティブ期間においてサンプリング電圧ＶＳＡとフィルター処理後の基準電圧ＶＲＦとの差に応じた電流を出力する。【選択図】図１