OUTPUT CIRCUIT

To suppress the difference between the output impedance at the time of high-level signal output and the output impedance at the time of low-level signal output.SOLUTION: The output circuit includes an output terminal from which a high-level signal or a low-level signal is output, a first resistor el...

Full description

Saved in:
Bibliographic Details
Main Author SASAKI SEIICHIRO
Format Patent
LanguageEnglish
Japanese
Published 12.10.2023
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Online AccessGet full text

Cover

More Information
Summary:To suppress the difference between the output impedance at the time of high-level signal output and the output impedance at the time of low-level signal output.SOLUTION: The output circuit includes an output terminal from which a high-level signal or a low-level signal is output, a first resistor element, one end of which is connected to the output terminal and through which a high-level signal passes, and a second resistor element, one end of which is connected to the output terminal and through which a low-level signal passes.SELECTED DRAWING: Figure 1 【課題】ハイレベル信号出力時における出力インピーダンスと、ローレベル信号出力時における出力インピーダンスとの差を抑制する。【解決手段】出力回路は、ハイレベル信号又はローレベル信号が出力される出力端子と、一端が出力端子に接続され、ハイレベル信号が通過する第１の抵抗素子と、一端が出力端子に接続され、ローベル信号が通過する第２の抵抗素子と、を含む。【選択図】図１
Bibliography:Application Number: JP20220054207