MANUFACTURING METHOD OF MULTILAYER CERAMIC ELECTRONIC COMPONENT, MULTILAYER CERAMIC ELECTRONIC COMPONENT, AND CIRCUIT BOARD
To provide a manufacturing method of a multilayer ceramic electronic component capable of suppressing fusion of an external electrode, the multilayer ceramic electronic component, and a circuit board.SOLUTION: A manufacturing method of a multilayer ceramic electronic component includes: a step of pr...
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Main Authors | , |
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Format | Patent |
Language | English Japanese |
Published |
12.10.2023
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Subjects | |
Online Access | Get full text |
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Summary: | To provide a manufacturing method of a multilayer ceramic electronic component capable of suppressing fusion of an external electrode, the multilayer ceramic electronic component, and a circuit board.SOLUTION: A manufacturing method of a multilayer ceramic electronic component includes: a step of preparing an element assembly including a first end face which includes a plurality of dielectric layers and a plurality of internal electrode layers laminated via the plurality of dielectric layers and in which ends of partial internal electrode layers in the plurality of internal electrode layers are exposed, and a second end face in which ends of the other partial internal electrode layers in the plurality of internal electrode layers are exposed and which is opposed with the first end face; a first external electrode forming step of seizing and forming a first external electrode on the first end face; and a second external electrode forming step is seizing and forming a second external electrode, of which the composition is different from that of the first external electrode, on the second end face at a temperature lower than that in the first external electrode forming step by 50°C or more.SELECTED DRAWING: Figure 6
【課題】 外部電極の融着を抑制することができる積層セラミック電子部品の製造方法、積層セラミック電子部品、および回路基板を提供する。【解決手段】 積層セラミック電子部品の製造方法は、複数の誘電体層と、複数の誘電体層を介して積層された複数の内部電極層とを有し、複数の内部電極層のうち一部の内部電極層の端部が露出する第1端面と、複数の内部電極層のうち他の一部の内部電極層の端部が露出し第1端面と対向する第2端面とを有する素体を用意する工程と、第1端面に第1外部電極を焼き付けて形成する第1外部電極形成工程と、第2端面に、第1外部電極と組成が異なる第2外部電極を、第1外部電極形成工程より50℃以上低い温度で焼き付けて形成する第2外部電極形成工程と、を含む。【選択図】 図6 |
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Bibliography: | Application Number: JP20220054153 |